Microcontrolador MCU XMOS XS1-L01A-TQ128-C5, TQFP de 128 pines

Procesador controlado por eventos XS1

An XS1 combines a number of XCore™ processors, each with its own memory, on a single chip. The programmable processors are general purpose in the sense that they can execute languages such as C; they also have direct support for concurrent processing (multi-threading), communication and input-output. A high-performance switch supports communication between the processors, and inter-chip XMOS Links are provided so that systems can easily be constructed from multiple chips. The XS1 products are intended to make it practical to use software to perform many functions which would normally be done by hardware; an important example is interfacing and input-output controllers.

Cada procesador XCore proporciona los siguientes recursos:
Procesador de 32 bits que proporciona hasta 500 MIPS
Ocho tramas de hardware y 32 extremos de canal
Diez temporizadores y seis bloques de reloj
Cuatro XMOS Link
SRAM de 64 KBytes y memoria OTP de 8K Bytes