Microchip AEC-Q100 Microprocesador dsPIC33CK256MP508 FAMILY CPU dsPIC33CK 16 bit CISC 100 MHZ TQFP 64 pines

Microchip’s dsPIC33CK family of digital signal controllers (DSCs) features a single 100 MIPS 16-bit dsPIC® DSC core with integrated DSP and enhanced on-chip peripherals. These DSCs enable the design of high-performance, precision motor control systems that are more energy efficient, quieter in operation and provide extended motor life. They can be used to control BLDC, PMSM, ACIM, SR and stepper motors.

• 3.0V to 3.6V, -40ºC to +125ºC, DC to 100 MIPS
• dsPIC33CK DSC Core:
• Modified Harvard architecture with 16-bit data and 24-bit instructions
• Code efficient (C and Assembly) CPU architecture designed for real-time applications
• 16 16-bit working registers
• 4 sets of interrupt context saving registers, including ACC and CPU status for fast interrupt handling
• Single-cycle, mixed-sign 32-bit MUL
• Fast 6-cycle hardware 32/16 and 16/16 DIV
• Dual 40-bit fixed point Accumulators (ACC) for DSP operations
• Single-cycle MAC/MPY with dual data fetch and result write-back
• Zero overhead looping support